제조업체 | 부품명 | 데이터시트 | 상세설명 |
Motorola, Inc |
MC74HC11
|
140Kb/4P
|
Triple 3-lnput AND Gate High-Performance silicon-gate CMOS
|
NXP Semiconductors |
MC74HC11
|
759Kb/40P
|
Universal Digital Loop Transceiver (UDLT-3) Evaluation Module
Rev. 3, 2/2002
|
ON Semiconductor |
MC74HC112
|
138Kb/7P
|
Dual J-K Flip-Flop with Set and Reset
May, 2013 ??Rev. 8
|
Motorola, Inc |
MC74HC112
|
214Kb/6P
|
Dual J-K Flip-Flop with Set and Reset High?밣erformance Silicon?밎ate CMOS
|
ON Semiconductor |
MC74HC112A
|
181Kb/8P
|
Dual J-K Flip-Flop with Set and Reset High?뭁erformance Silicon?묰ate CMOS
December, 2009 ??Rev. 7
|
MC74HC112ADG
|
181Kb/8P
|
Dual J-K Flip-Flop with Set and Reset High?뭁erformance Silicon?묰ate CMOS
December, 2009 ??Rev. 7
|
MC74HC112ADG
|
138Kb/7P
|
Dual J-K Flip-Flop with Set and Reset
May, 2013 ??Rev. 8
|
MC74HC112ADR2G
|
181Kb/8P
|
Dual J-K Flip-Flop with Set and Reset High?뭁erformance Silicon?묰ate CMOS
December, 2009 ??Rev. 7
|
MC74HC112ADR2G
|
138Kb/7P
|
Dual J-K Flip-Flop with Set and Reset
May, 2013 ??Rev. 8
|
MC74HC112ADTG
|
138Kb/7P
|
Dual J-K Flip-Flop with Set and Reset
May, 2013 ??Rev. 8
|
MC74HC112ADTR2G
|
138Kb/7P
|
Dual J-K Flip-Flop with Set and Reset
May, 2013 ??Rev. 8
|
MC74HC112ADTR2G
|
181Kb/8P
|
Dual J-K Flip-Flop with Set and Reset High?뭁erformance Silicon?묰ate CMOS
December, 2009 ??Rev. 7
|
MC74HC112AFELG
|
181Kb/8P
|
Dual J-K Flip-Flop with Set and Reset High?뭁erformance Silicon?묰ate CMOS
December, 2009 ??Rev. 7
|
MC74HC112ANG
|
181Kb/8P
|
Dual J-K Flip-Flop with Set and Reset High?뭁erformance Silicon?묰ate CMOS
December, 2009 ??Rev. 7
|
MC74HC112
|
138Kb/7P
|
Dual J-K Flip-Flop with Set and Reset
May, 2013 ??Rev. 8
|
MC74HC11A
|
121Kb/6P
|
Triple 3-Input AND Gate
June, 2013 ??Rev. 3
|
MC74HC11ADG
|
121Kb/6P
|
Triple 3-Input AND Gate
June, 2013 ??Rev. 3
|
MC74HC11ADR2G
|
121Kb/6P
|
Triple 3-Input AND Gate
June, 2013 ??Rev. 3
|
MC74HC11ADTG
|
121Kb/6P
|
Triple 3-Input AND Gate
June, 2013 ??Rev. 3
|
MC74HC11ADTR2G
|
121Kb/6P
|
Triple 3-Input AND Gate
June, 2013 ??Rev. 3
|