제조업체 | 부품명 | 데이터시트 | 상세설명 |
Renesas Technology Corp |
UPD44164095A-A
|
590Kb/42P
|
MOS INTEGRATED CIRCUIT
2009
|
UPD44164095AF5-E33-EQ2-A
|
590Kb/42P
|
MOS INTEGRATED CIRCUIT
2009
|
UPD44164095AF5-E40-EQ2-A
|
590Kb/42P
|
MOS INTEGRATED CIRCUIT
2009
|
UPD44164095AF5-E50-EQ2-A
|
590Kb/42P
|
MOS INTEGRATED CIRCUIT
2009
|
UPD44164095B
|
468Kb/35P
|
18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION
October 6, 2011
|
UPD44164095BF5-E33-EQ3
|
468Kb/35P
|
18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION
October 6, 2011
|
UPD44164095BF5-E33-EQ3-A
|
468Kb/35P
|
18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION
October 6, 2011
|
UPD44164095BF5-E33Y-EQ3
|
468Kb/35P
|
18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION
October 6, 2011
|
UPD44164095BF5-E33Y-EQ3-A
|
468Kb/35P
|
18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION
October 6, 2011
|
UPD44164095BF5-E35-EQ3
|
468Kb/35P
|
18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION
October 6, 2011
|
UPD44164095BF5-E35-EQ3-A
|
468Kb/35P
|
18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION
October 6, 2011
|
UPD44164095BF5-E35Y-EQ3
|
468Kb/35P
|
18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION
October 6, 2011
|
UPD44164095BF5-E35Y-EQ3-A
|
468Kb/35P
|
18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION
October 6, 2011
|
UPD44164095BF5-E40-EQ3
|
468Kb/35P
|
18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION
October 6, 2011
|
UPD44164095BF5-E40-EQ3-A
|
468Kb/35P
|
18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION
October 6, 2011
|
UPD44164095BF5-E40Y-EQ3
|
468Kb/35P
|
18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION
October 6, 2011
|
UPD44164095BF5-E40Y-EQ3-A
|
468Kb/35P
|
18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION
October 6, 2011
|
UPD44164095BF5-E50-EQ3
|
468Kb/35P
|
18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION
October 6, 2011
|
UPD44164095BF5-E50-EQ3-A
|
468Kb/35P
|
18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION
October 6, 2011
|
UPD44164095BF5-E50Y-EQ3
|
468Kb/35P
|
18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION
October 6, 2011
|