Functional description
The AS7C31025B is a high-performance CMOS 1,048,576-bit Static Random Access Memory (SRAM) device organized as 131,072 x 8 bits. It is designed for memory applications where fast data access, low power, and simple interfacing are desired.

Features
• Industrial and commercial temperatures
• Organization: 131,072 x 8 bits
• High speed
    - 10/12/15/20 ns address access time
    - 5, 6, 7, 8 ns output enable access time
• Low power consumption: ACTIVE
    - 252 mW / max @ 10 ns
• Low power consumption: STANDBY
    - 18 mW / max CMOS
• 6 T 0.18 u CMOS technology
• Easy memory expansion with CE, OE inputs
• Center power and ground
• TTL/LVTTL-compatible, three-state I/O
• JEDEC-standard packages
    - 32-pin, 300 mil SOJ
    - 32-pin, 400 mil SOJ
• ESD protection ≥ 2000 volts
• Latch-up current ≥ 200 mA