| 전자부품 데이터시트 검색엔진 |
|
ST72F324J2T6 데이터시트(PDF) 117 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
ST72F324J2T6 데이터시트(HTML) 117 Page - STMicroelectronics |
|
117 / 156 page ![]() ST72324J/K 117/156 12.3.4 Auxiliary Voltage Detector (AVD) Thresholds Subject to general operating condition for VDD, fCPU, and TA. 1. Data based on characterization results, not tested in production. 2. Applicable only in low voltage devices (planned). Symbol Parameter Conditions Min Typ Max Unit VIT+(AVD) 1 ⇒0 AVDF flag toggle threshold (VDD rise) VD level = High in option byte 4.41) 4.6 4.9 V VD level = Med. in option byte2) VD level = Low in option byte2) 3.95 1) 3.4 1) 4.15 3.6 4.4 3.8 VIT-(AVD) 0 ⇒1 AVDF flag toggle threshold (VDD fall) VD level = High in option byte 4.2 4.4 4.65 1) VD level = Med. in option byte2) VD level = Low in option byte2) 3.75 3.2 4.0 3.4 4.2 1) 3.6 1) Vhys(AVD) AVD voltage threshold hysteresis VIT+(AVD)-VIT-(AVD) 200 mV ∆V IT- Voltage drop between AVD flag set and LVD reset activated VIT-(AVD)-VIT-(LVD) 450 mV |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |