 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
PIC18F4520E/MLQTP 데이터시트(PDF) 236 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
PIC18F4520E/MLQTP 데이터시트(HTML) 236 Page - Microchip Technology |
|
|
236 / 390 page  PIC18F2420/2520/4420/4520 DS39631A-page 234 Preliminary 2004 Microchip Technology Inc. 20.1 Comparator Configuration There are eight modes of operation for the compara- tors, shown in Figure 20-1. Bits CM2:CM0 of the CMCON register are used to select these modes. The TRISA register controls the data direction of the com- parator pins for each mode. If the Comparator mode is changed, the comparator output level may not be valid for the specified mode change delay shown in Section 26.0 “Electrical Characteristics”. FIGURE 20-1: COMPARATOR I/O OPERATING MODES Note: Comparator interrupts should be disabled during a Comparator mode change; otherwise, a false interrupt may occur. C1 RA0/AN0 VIN- VIN+ RA3/AN3/ Off (Read as ‘0’) Comparators Reset A A CM2:CM0 = 000 C2 RA1/AN1 VIN- VIN+ RA2/AN2/ Off (Read as ‘0’) A A C1 VIN- VIN+ C1OUT Two Independent Comparators A A CM2:CM0 = 010 C2 VIN- VIN+ C2OUT A A C1 VIN- VIN+ C1OUT Two Common Reference Comparators A A CM2:CM0 = 100 C2 VIN- VIN+ C2OUT A D C2 VIN- VIN+ Off (Read as ‘0’) One Independent Comparator with Output D D CM2:CM0 = 001 C1 VIN- VIN+ C1OUT A A C1 VIN- VIN+ Off (Read as ‘0’) Comparators Off (POR Default Value) D D CM2:CM0 = 111 C2 VIN- VIN+ Off (Read as ‘0’) D D C1 VIN- VIN+ C1OUT Four Inputs Multiplexed to Two Comparators A A CM2:CM0 = 110 C2 VIN- VIN+ C2OUT A A From VREF Module CIS = 0 CIS = 1 CIS = 0 CIS = 1 C1 VIN- VIN+ C1OUT Two Common Reference Comparators with Outputs A A CM2:CM0 = 101 C2 VIN- VIN+ C2OUT A D A = Analog Input, port reads zeros always D = Digital Input CIS (CMCON<3>) is the Comparator Input Switch CVREF C1 VIN- VIN+ C1OUT Two Independent Comparators with Outputs A A CM2:CM0 = 011 C2 VIN- VIN+ C2OUT A A RA5/AN4/SS/HLVDIN/C2OUT* RA4/T0CKI/C1OUT* VREF+ VREF-/CVREF RA0/AN0 RA3/AN3/ RA1/AN1 RA2/AN2/ VREF+ VREF-/CVREF RA0/AN0 RA3/AN3/ RA1/AN1 RA2/AN2/ VREF+ VREF-/CVREF RA0/AN0 RA3/AN3/ RA1/AN1 RA2/AN2/ VREF+ VREF-/CVREF RA0/AN0 RA3/AN3/ RA1/AN1 RA2/AN2/ VREF+ VREF-/CVREF RA0/AN0 RA3/AN3/ RA1/AN1 RA2/AN2/ VREF+ VREF-/CVREF RA0/AN0 RA3/AN3/ VREF+ RA1/AN1 RA2/AN2/ VREF-/CVREF RA4/T0CKI/C1OUT* RA5/AN4/SS/HLVDIN/C2OUT* RA0/AN0 RA3/AN3/ VREF+ RA1/AN1 RA2/AN2/ VREF-/CVREF RA4/T0CKI/C1OUT* * Setting the TRISA<5:4> bits will disable the comparator outputs by configuring the pins as inputs. |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
