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STR720 데이터시트(PDF) 150 Page - STMicroelectronics

부품명 STR720
상세설명  ARM720T 16/32-BIT MCU WITH 16K RAM, USB, CAN, 3 TIMERS, ADC, 6 COMMUNICATIONS INTERFACES
PDF  401 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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STR720 데이터시트(HTML) 150 Page - STMicroelectronics

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STR720 - REAL TIME CLOCK (RTC)
150/401
14
REAL TIME CLOCK (RTC)
14.1 Introduction
The RTC provides a set of continuously running counters which can be used, with suitable
software, to provide a clock-calendar function. The counters values can be written to set the
current time/date of the system.
The RTC includes an APB slave interface, to provide access by word to internal 48-bit
registers. this interface is properly disconnected by the APB bus when the main power supply
is removed.
14.2 Main Features
■
48-bit programmable counter for long term measurement
■
External clock input, CLK_AF, defining RTC ticks (must be at least 4 times slower than APB
clock) driven by two different sources:
•
32 kHz crystal oscillator connected to OSCIN and OSCOUT
•
External clock generator connected to OSCIN
■
Separate power supply
■
2 dedicated maskable interrupt lines:
•
alarm interrupt, to generate a software programmable alarm interrupt (up to 1 s)
•
periodic interrupt, to generate a software programmable periodic interrupt (up to 32 s)
14.3 Functional Description
14.3.1
Overview
The RTC consists of two main units (see Figure 18 on page 151), the first one (S-APB
Interface) is used to interface with the APB bus. This unit also contains a set of 16-bit
registers, synchronous to the S-APB clock and accessible from the APB bus in read or write
mode (for more details refer to Register description section). The APB interface is clocked by
S-APB clock in order to interface with APB bus.
The other unit (RTC Core) consists of three programmable registers. The first is made of a
48-bit programmable counter that may be initialized to the current system time. The system
time is incremented at CLK_AF rate and compared with a programmable date (stored in the
second 48-bit register, RTCA) in order to generate an alarm via an interrupt (Alarm), if
enabled in the RTCCR control register. The third register is the 20-bit RTCP register that is
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