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STR720 데이터시트(PDF) 175 Page - STMicroelectronics |
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STR720 데이터시트(HTML) 175 Page - STMicroelectronics |
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175 / 401 page ![]() STR720 - UART 175/401 16.3.6 Interrupt control The ASC has a single interrupt coming out of it, called ASC_interrupt. The status bits in the ASC-Status register determine the cause of the interrupt. ASC_interrupt will go high when a status bit is 1 (high) and the corresponding bit in the ASCIntEnable register is 1 (see Figure 22). Note: The ASCStatus register is read only. The Status bits can only be cleared by operating on the FIFOs. The RxFIFO and TxFIFO can be reset by writing to the ASCRxReset and ASCTxReset registers. 300 4166.667 4167 1047 0.008% 75 16666.667 16667 411B 0.002% Figure 22. UART interrupt request Table 44. Baud rates with fAPB = 20 MHz Baud rate Reload value (exact) Reload value (integer) Reload value (hex) Deviation error TimeoutIdle TimeoutIdle IE TimeoutNotEmpty TimeoutNotEmpty IE OverrunError OverrunError IE FrameError FrameError IE ParityError ParityError IE TxHalfEmpty TxHalfEmpty IE TxEmpty TxEmpty IE RxBufNotEmpty RxBufNotEmpty IE ASC_interrupt RxHalfFull RxHalfFull IE 1 |
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