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STR720 데이터시트(PDF) 241 Page - STMicroelectronics

부품명 STR720
상세설명  ARM720T 16/32-BIT MCU WITH 16K RAM, USB, CAN, 3 TIMERS, ADC, 6 COMMUNICATIONS INTERFACES
PDF  401 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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STR720 데이터시트(HTML) 241 Page - STMicroelectronics

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STR720 - CONTROLLER AREA NETWORK (CAN)
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18.7.2.1 Data Transfer from/to Message RAM
When the CPU initiates a data transfer between the IFn Registers and Message RAM, the
Message Handler sets the Busy bit in the respective Command Request Register
(CAN_IFn_CRR). After the transfer has completed, the Busy bit is again cleared (see Figure
33).
The respective Command Mask Register specifies whether a complete Message Object or
only parts of it will be transferred. Due to the structure of the Message RAM, it is not possible
to write single bits/bytes of one Message Object. It is always necessary to write a complete
Message Object into the Message RAM. Therefore, the data transfer from the IFn Registers to
the Message RAM requires a read-modify-write cycle. First, those parts of the Message
Object that are not to be changed are read from the Message RAM and then the complete
contents of the Message Buffer Registers are written into the Message Object.
Figure 33. Data transfer between
IFn Registers and Message RAM
START
WR/RD = 1
Busy = 0
Busy = 1
Read Message Object to IFn
Write IFn to Message RAM
Read Message Object to IFn
No
Yes
CAN_WAIT_B = 0
CAN_WAIT_B = 1
Write Command Request Register
No
Yes
1



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