STR720 datasheet(279/401 Pages) STMICROELECTRONICS

279 / 401 page

STR720 - USB SLAVE INTERFACE (USB)

279/401

19.6 Register Description

The USB Peripheral registers can be divided into the following groups:

•

Common Registers: Interrupt and Control registers

•

Endpoint Registers: Endpoint configuration and status

•

Buffer Descriptor Table: Location of packet memory used to locate data buffers

All register addresses are expressed as offsets with respect to the USB Peripheral registers

base address 0xC000 8000, except the buffer descriptor table locations, which starts at the

address specified by the USB_BTABLE register. Due to the common limitation of APB bridges

on word addressability, all register addresses are aligned to 32-bit word boundaries although

they are 16-bit wide. The same address alignment is used to access packet buffer memory

locations, which are located starting from 0xC000 8800. In this section, the following

abbreviations are used:

read/write (rw)

The software can read and write to these bits.

read-only (r)

The software can only read these bits.

write-only (w)

The software can only write to these bits.

Read-clear (rc)

The software can only read or clear this bit.

Toggle (t)

The software can only toggle this bit by writing ‘1’. Writing ‘0’

has no effect.

STR720 데이터시트(PDF) 279 Page - STMicroelectronics