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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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STR720 데이터시트(PDF) 349 Page - STMicroelectronics |
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STR720 데이터시트(HTML) 349 Page - STMicroelectronics |
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349 / 401 page  STR720 - GENERAL PURPOSE I/O PORTS 349/401 Port Configuration Register1 (PC1) Address Offset: 04h Reset value: (*) Bit 15:0 = C1[15:0]: Port Configuration bits See Table 72 on page 344 to configure the IO Port. Port Configuration Register2 (PC2) Address Offset: 08h Reset value: (*) Bit 15:0 = C2[15:0]: Port Configuration bits See Table 72 on page 344 to configure the IO Port. IO Data Register (PD) Address Offset: 0Ch Reset value: (*) Bit 15:0 = D[15:0]: IO Data bits A writing access to this register always writes the data in the Output Latch. A reading access reads the data from the Input Latch in Input and Alternate function configurations or from the Output Latch in Output and High impedance configurations. (*) Refer to the device IO pin list 15 14 13 12 11 10 9 8 765432 1 0 C115 C114 C113 C112 C111 C110 C19 C18 C17 C16 C15 C14 C13 C12 C11 C10 rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw 15 14 13 12 11 10 9 8 765432 1 0 C215 C214 C213 C212 C211 C210 C29 C28 C27 C26 C25 C24 C23 C22 C21 C20 rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw 15 14 13 12 11 10 9 8 765432 1 0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw |
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