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ST7SB20J/EU 데이터시트(PDF) 130 Page - STMicroelectronics |
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ST7SB20J/EU 데이터시트(HTML) 130 Page - STMicroelectronics |
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130 / 154 page ![]() ST7232A 130/154 CONTROL PIN CHARACTERISTICS (Cont’d) Figure 73. RESET pin protection1)2)3)4) 1. The reset network protects the device against parasitic resets. 2. The output of the external reset circuit must have an open-drain output to drive the ST7 reset pad. Otherwise the device can be damaged when the ST7 generates an internal reset (watchdog). 3. Whatever the reset source is (internal or external), the user must ensure that the level on the RESET pin can go below the VIL max. level specified in Section 12.9.1 . Otherwise the reset will not be taken into account internally. 4. Because the reset circuit is designed to allow the internal RESET to be output in the RESET pin, the user must ensure that the current sunk on the RESET pin (by an external pull-up for example) is less than the absolute maximum value specified for IINJ(RESET) in Section 12.2.2 on page 112. 0.01 µF 0.01 µF VDD EXTERNAL RESET CIRCUIT USER VDD 4.7k Ω Required Recommended for EMC ST72XXX PULSE GENERATOR Filter RON VDD WATCHDOG INTERNAL RESET 1 |
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