STM32MP151C datasheet(127/253 Pages) STMICROELECTRONICS

127 / 253 page

DS12501 Rev 3

127/253

STM32MP151C/F

Electrical characteristics

232

Figure 14. VDDCORE rise time from LPLV-Stop

6.3.3

Embedded reset and power control block characteristics

The parameters given in Table 15 are derived from tests performed under ambient

temperature and VDD supply voltage conditions summarized in Table 13: General operating

conditions.

MSv47499V2

VDDCORE

PWR_LP

tSEL_VDDCORETEMPO

VDDCORE should be above

VDDCORE Min at the end of

tSEL_VDDCORETEMPO

VPVDCORE_1 (falling edge)

Run mode

VDDCORE Min = VPVDCORE_1 Min (falling edge) + tVSEL_VDDCORETEMPO Min / tVDDCORE Max

average rise time rate should be less than

tVDDCORE Max (from LPLV-Stop to Run

mode)

VDDCORE Min

Wait

LPLV-

Stop

mode

Table 15. Embedded reset and power control block characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

tRSTTEMPO(1)

Reset temporization. after

BOR0 released

377

550

µs

VBOR0(1)

Brown-out reset threshold 0

Rising edge

1.62

1.67

1.71

Falling edge

1.58

1.63

1.67

VBOR1

Brown-out reset threshold 1

Rising edge

2.055

2.1

2.145

Falling edge

1.955

2.045

VBOR2

Brown-out reset threshold 2

Rising edge

2.355

2.4

2.445

Falling edge

2.255

2.3

2.345

VBOR3

Brown-out reset threshold 3

Rising edge

2.655

2.7

2.745

Falling edge

2.555

2.6

2.645

VPVD0

Programmable Voltage

Detector threshold 0

Rising edge

1.905

1.95

1.995

Falling edge

1.805

1.85

1.895

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