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XRT7250 데이터시트(PDF) 416 Page - Exar Corporation |
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XRT7250 데이터시트(HTML) 416 Page - Exar Corporation |
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416 / 463 page ![]() áç áç áç áç XRT7250 DS3/E3 FRAMER IC REV. 1.1.1 397 plished by periodically reading the PMON Framing Bit/Byte Error Event Count Registers (Address = 0x52 and 0x53). The byte format of these registers are presented below. 6.3.2.5 The RxOOF and RxLOF output pin. The user can roughly determine the current framing state that the Receive E3 Framer block is operating in by reading the logic state of the RxOOF and the Rx- LOF output pins. Table 85 presents the relationship between the state of the RxOOF and RxLOF output pins, and the Framing State of the Receive E3 Framer block. 6.3.2.6 E3 Receive Alarms 6.3.2.6.1 The Loss of Signal (LOS) Alarm Declaring an LOS Condition The Receive E3 Framer block will declare a Loss of Signal (LOS) Condition, when it detects 32 consecu- tive incoming “0’s” via the RxPOS and RxNEG input pins or if the ExtLOS input pin (from the XRT7300 DS3/E3/STS-1 LIU IC) is asserted. The Receive E3 Framer block will indicate that it is declaring an LOS condition by. • Asserting the RxLOS output pin (e.g., toggling it “High”). • Setting Bit 4 (RxLOS) of the Rx E3 Configuration & Status Register to “1” as depicted below. • The Receive E3 Framer block will generate a Change in LOS Condition interrupt request. Upon generating this interrupt request, the Receive E3 Framer block will assert Bit 1 (LOS Interrupt Status within the Rx E3 Framer Interrupt Status Register - 1, as depicted below. Clearing the LOS Condition The Receive E3 Framer block will clear the LOS con- dition when it encounters a stream of 32 bits that does not contain a string of 4 consecutive zeros. TABLE 85: THE RELATIONSHIP BETWEEN THE LOGIC STATE OF THE RXOOF AND RXLOF OUTPUT PINS, AND THE FRAMING STATE OF THE RECEIVE E3 FRAMER BLOCK RXLOF RXOOF FRAMING STATE OF THE RECEIVE E3 FRAMER BLOCK 00 In Frame 01 OOF Condition (The Receive E3 Framer block is operating in the 3ms OOF period). 10 Invalid 11 LOF Condition RXE3 CONFIGURATION & STATUS REGISTER 2 (ADDRESS = 0X11) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Rx LOF Algo RxLOF RxOOF RxLOS RxAIS RxPld Unstab Rx TMark RxFERF R/W RORO RO RORORORO 0 0010 000 RXE3 INTERRUPT STATUS REGISTER - 1 (ADDRESS = 0X14) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Not Used COFA Interrupt Status OOF Interrupt Status LOF Interrupt Status LOS Interrupt Status AIS Interrupt Status RO RO RO RUR RUR RUR RUR RUR 0 0000 010 |
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