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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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XRT7250 데이터시트(PDF) 458 Page - Exar Corporation |
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XRT7250 데이터시트(HTML) 458 Page - Exar Corporation |
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458 / 463 page  áç áç áç áç XRT7250 DS3/E3 FRAMER IC REV. 1.1.1 439 load Type value, then the XRT7250 Framer IC will generate this interrupt. Enabling and Disabling the Detection of Payload Type Mismatch Interrupt. The user can enable or disable the Detection of Pay- load Type Mismatch Interrupt by writing the appropri- ate data into Bit 0 (RxPld Mis Interrupt Enable), within the Rx E3 Interrupt Enable Register - 2, as indicated below. Setting this bit-field to “1 enables the Detection of Payload Type Mismatch Interrupt. Conversely, setting this bit-field to “0” disables the Detection of Payload Type Mismatch Interrupt. Servicing the Detection of Payload Type Mis- match Interrupt Whenever the XRT7250 Framer IC generates this in- terrupt, it will do the following. • It will assert the Interrupt Request output pin (INT) by driving it “Low”. • It will set Bit 0 (RxPld Mis Interrupt Status), within the Rx E3 Interrupt Enable Register -2 to “1”, as indicated below. 6.3.6.2.12 The Receive LAPD Message Interrupt If the Receive LAPD Message Interrupt is enabled, then the XRT7250 Framer IC will generate an inter- rupt anytime the Receive HDLC Controller block has received a new LAPD Message frame from the Re- mote Terminal Equipment, and has stored the con- tents of this message into the Receive LAPD Mes- sage buffer. Enabling/Disabling the Receive LAPD Message Interrupt The user can enable or disable the Receive LAPD Message Interrupt by writing the appropriate data into Bit 1 (RxLAPD Interrupt Enable) within the Rx E3 LAPD Control Register, as indicated below. RXE3 CONFIGURATION & STATUS REGISTER 1 (ADDRESS = 0X10) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 RxPLDType[2:0] RxFERF Algo RxTMark Algo RxPLDExp[2:0] RO RO RO RO RO R/W R/W R/W 0 0000 000 RXE3 INTERRUPT ENABLE REGISTER - 2 (ADDRESS = 0X13) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Not Used TTB Change Interrupt Enable Not Used FEBE Interrupt Enable FERF Interrupt Enable BIP-8 Error Interrupt Enable Framing Byte Error Interrupt Enable RxPld Mis Interrupt Enable RO R/W RO R/W R/W R/W R/W R/W 0 0 0X X 0 0X RXE3 INTERRUPT STATUS REGISTER - 2 (ADDRESS = 0X15) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Not Used TTB Change Interrupt Status Not Used FEBE Interrupt Status FERF Interrupt Status BIP-8 Error Interrupt Status Framing Byte Error Interrupt Status RxPld Mis Interrupt Status RO RUR RO RUR RUR RUR RUR RUR 0 0010 000 |
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