전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

STM32G474PBY6TR 데이터시트(PDF) 198 Page - STMicroelectronics

부품명 STM32G474PBY6TR
상세설명  Arm® Cortex®-M4 32-bit MCUFPU, 170 MHz / 213 DMIPS, 128 KB SRAM, rich analog, math acc, 184 ps 12 chan Hi-res timer
PDF  236 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32G474PBY6TR 데이터시트(HTML) 198 Page - STMicroelectronics

Back Button STM32G474PBY6TR Datasheet HTML 194Page - STMicroelectronics STM32G474PBY6TR Datasheet HTML 195Page - STMicroelectronics STM32G474PBY6TR Datasheet HTML 196Page - STMicroelectronics STM32G474PBY6TR Datasheet HTML 197Page - STMicroelectronics STM32G474PBY6TR Datasheet HTML 198Page - STMicroelectronics STM32G474PBY6TR Datasheet HTML 199Page - STMicroelectronics STM32G474PBY6TR Datasheet HTML 200Page - STMicroelectronics STM32G474PBY6TR Datasheet HTML 201Page - STMicroelectronics STM32G474PBY6TR Datasheet HTML 202Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 198 / 236 page
background image
Electrical characteristics
STM32G474xB STM32G474xC STM32G474xE
198/236
DS12288 Rev 5
5.3.29
QUADSPI characteristics
Unless otherwise specified, the parameters given in Table 108 and Table 109 for Quad SPI
are derived from tests performed under the ambient temperature, fAHB frequency and VDD
supply voltage conditions summarized in Table 17: General operating conditions, with the
following configuration:
•
Output speed is set to OSPEEDRy[1:0] = 11
•
Capacitive load C = 15 or 20 pF
•
Measurement points are done at CMOS levels: 0.5 ₓ VDD
Refer to Section 5.3.14: I/O port characteristics for more details on the input/output alternate
function characteristics.
Table 108. Quad SPI characteristics in SDR mode(1)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
F(QCK)
Quad SPI clock
frequency
1.71 < VDD< 3.6 V,
CLOAD = 15 pF
Voltage Range 1
--
50
MHz
1.71 < VDD< 3.6 V,
CLOAD = 20 pF
Voltage Range 2
--
110
tw(CKH) Quad SPI clock high
and low time
Even division
PRESCALER [7:0]
n =0,1, 3, 5...
t(CK)/2-0.5
-
t(CK)/2+1
ns
tw(CKL)
t(CK)/2-1
-
t(CK)/2+0.5
tw(CKH) Quad SPI clock high
and low time
Odd division
PRESCALER [7:0]
n =2,4, 6, 8...
(n/2)*t(CK)/(n+1) - 0.5
-
(n/2)*t(CK)/(n+1) + 1
tw(CKL)
(n/2+1)*t(CK)/(n+1) - 1
-
(n/2+1)*t(CK)/(n+1) +0.5
ts(IN)
Data input setup time 1.71 < VDD< 3.6 V
1
-
-
th(IN)
Data input hold time
1.71 < VDD< 3.6 V
5
-
-
tv(OUT)
Data output valid
time
1.71 < VDD< 3.6 V
-
1
1.5
th(OUT) Data output hold time 1.71 < VDD< 3.6 V
0.5
-
-
1. Guaranteed by characterization results.
Table 109. QUADSPI characteristics in DDR mode(1)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
F(QCK)
Quad SPI clock
frequency
1.71 < VDD< 3.6 V,
CLOAD = 15 pF
Voltage Range 1
--
50
MHz
1.71 < VDD< 3.6 V,
CLOAD = 20 pF
Voltage Range 2
--
70



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com