LH540203D datasheet(12/17 Pages) SHARP

12 / 17 page

TIMING DIAGRAMS (cont’d)

FF

R

W

tRFF

t WFF

LAST WRITE

FIRST READ

540204-6

Figure 12. Full Flag From Last Write to First Read

EF

W

R

t WEF

tREF

LAST READ

FIRST WRITE

540203-7

NOTE: The Data Out pins (D0 - D8) are forced into a

high-impedance state whenever EF = LOW.

Figure 13. Empty Flag From Last Read to First Write

LH540203

CMOS 2048

× 9 Asynchronous FIFO

12

유사한 부품 번호 - LH540203D

제조업체	부품명	데이터시트	상세설명
Sharp Corporation	LH540203	156Kb / 17P	CMOS 2048 x 9 Asynchronous FIFO

제조업체	부품명	데이터시트	상세설명
Integrated Device Techn...	7202LA20JG	313Kb / 14P	CMOS ASYNCHRONOUS FIFO
Integrated Device Techn...	IDT7203	143Kb / 14P	CMOS ASYNCHRONOUS FIFO
Renesas Technology Corp	IDT7203	276Kb / 15P	CMOS ASYNCHRONOUS FIFO NOVEMBER 2017
Integrated Device Techn...	IDT7203	112Kb / 14P	CMOS ASYNCHRONOUS FIFO
	IDT7200L	139Kb / 14P	CMOS ASYNCHRONOUS FIFO
	IDT7280	149Kb / 12P	CMOS DUAL ASYNCHRONOUS FIFO
	IDT7280	295Kb / 12P	CMOS DUAL ASYNCHRONOUS FIFO
Renesas Technology Corp	IDT7280	114Kb / 12P	CMOS DUAL ASYNCHRONOUS FIFO NOVEMBER 2017
Integrated Device Techn...	IDT72V01	301Kb / 12P	3.3 VOLT CMOS ASYNCHRONOUS FIFO
Integrated Device Techn...	IDT72V06	149Kb / 12P	3.3 VOLT CMOS ASYNCHRONOUS FIFO