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8.3.1.6 PRU_ICSSG MII_G_RT Module

The Real-time Media Independent Interface (MII_G_RT) provides a programmable I/O interface for the PRUs to

access and control up to two MII ports. The MII_G_RT module can also be configured to push and pull data

independent of the PRU cores.

8.3.1.7 PRU_ICSSG MII MDIO Module

The PRU_ICSSG MII MDIO management I/F module implements the 802.3 serial management interface to

interrogate and control two Ethernet PHYs simultaneously using a shared two-wire bus.

8.3.1.8 PRU_ICSSG IEP

The Industrial Ethernet Peripheral (IEP) performs hardware work required for Industrial Ethernet functions. The

IEP module features an industrial ethernet timer with 16 compare events, industrial ethernet sync generator and

latch capture, industrial ethernet watchdog timer, and a digital I/O port (DIGIO).

For more information, see Programmable Real-Time Unit Subsystem and Industrial Communication Subsystem -

Gigabit (PRU_ICSSG) section in the device TRM.

8.3.2 GPU

The Graphics Processing Unit (GPU) accelerates 2-dimensional (2D) and 3-dimensional (3D) graphics and

compute applications.

The GPU module is a scalable architecture which efficiently processes a number of differing multimedia data

types concurrently:

• Pixel Data

• Vertex Data

• General Purpose Processing

For more information, see Graphics Accelerator (GPU) section in the device TRM.

AM6548, AM6528, AM6526

SPRSP52B – DECEMBER 2019 – REVISED JUNE 2021

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AM652X 데이터시트(PDF) 250 Page - Texas Instruments