STM32L100RC datasheet(105/106 Pages) STMICROELECTRONICS

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DocID024995 Rev 5

105/106

STM32L100RC

105

28-Aug-2017

Updated Table 41: I/O static characteristics pull-up and pull-down values.

Updated Table 44: NRST pin characteristics pull-up values.

Updated Section 7: Package information adding information about other

optional marking or inset/upset marks.

Updated note 1 below all the package device marking figures.

Updated Section 7: Package information replacing “Marking of

engineering samples” by “device marking”.

Updated all the notes, removing ‘not tested in production’.

Updated Nested vectored interrupt controller (NVIC) in Section 3.2:

ARM® Cortex®-M3 core with MPU about process state automatically

saved.

Updated Table 2: Functionalities depending on the operating power

supply range removing I/O operation column and adding note about

GPIO speed.

Updated Table 40: I/O current injection susceptibility note by ‘injection is

not possible’.

Updated Figure 15: Recommended NRST pin protection note about the

0.1uF capacitor.

Updated cover page putting eight SPIs in the peripheral communication

interface list.

Updated Table 4: Functionalities depending on the working mode (from

Run/active down to standby) LSI and LSE functionalities putting “Y” in

Standby mode.

Removed note 1 below Figure 2: Clock tree.

Updated Table 9: Voltage characteristics adding note about VREF- pin.

Updated Table 38: ESD absolute maximum ratings CDM class.

Updated Table 57: DAC characteristics resistive load.

Updated Section 3.1: Low-power modes Low-power run mode (MSI) RC

oscillator clock.

Updated Table 4: Functionalities depending on the working mode (from

Run/active down to standby) disabling I2C functionality in Low-power

Run and Low-power Sleep modes.

Table 65. Document revision history (continued)

Date

Revision

Changes

STM32L100RC 데이터시트(PDF) 105 Page - STMicroelectronics