D301 datasheet(334/416 Pages) MICROCHIP

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PIC24FJ256GA705 FAMILY

DS30010118D-page 334

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FOSC CONFIGURATION REGISTER

U-1

—

bit 23

bit 16

U-1

—

bit 15

bit 8

R/PO-1

FCKSM1

FCKSM0

IOL1WAY

PLLSS

SOSCSEL

OSCIOFCN

POSCMD1

POSCMD0

bit 7

bit 0

Legend:

PO = Program Once bit

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 23-8

Unimplemented: Read as ‘1’

bit 7-6

FCKSM<1:0>: Clock Switching and Monitor Selection bits

1x = Clock switching and the Fail-Safe Clock Monitor are disabled

01 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled

00 = Clock switching and the Fail-Safe Clock Monitor are enabled

bit 5

IOL1WAY: Peripheral Pin Select Configuration bit

1 = The IOLOCK bit can be set only once (with unlock sequence).

0 = The IOLOCK bit can be set and cleared as needed (with unlock sequence)

bit 4

PLLSS: PLL Secondary Selection Configuration bit

This Configuration bit only takes effect when the PLL is NOT being used by the system (i.e., not

selected as part of the system clock source). Used to generate an independent clock out of REFO.

1 = PLL is fed by the Primary Oscillator

0 = PLL is fed by the on-chip Fast RC (FRC) Oscillator

bit 3

SOSCSEL: SOSC Selection Configuration bit

1 = Crystal (SOSCI/SOSCO) mode

0 = Digital (SOSCI) Externally Supplied Clock mode

bit 2

OSCIOFCN: CLKO Enable Configuration bit

1 = CLKO output signal is active on the OSCO pin (when the Primary Oscillator is disabled or configured

for EC mode)

0 = CLKO output is disabled

bit 1-0

POSCMD<1:0>: Primary Oscillator Configuration bits

11 = Primary Oscillator mode is disabled

10 = HS Oscillator mode is selected (10 MHz-32 MHz)

01 = XT Oscillator mode is selected (1.5 MHz-10 MHz)

00 = External Clock mode is selected

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