CC2430-RTR1-F32 datasheet(117/234 Pages) TI

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CC2430

CC2430 PRELIMINARY Data Sheet (rev. 1.03) SWRS036A

Page 117 of 232

13.5 Sleep Timer

The Sleep timer is used to set the period

between when the system enters and exits

low-power sleep modes.

The Sleep timer is also used to maintain

timing in Timer 2 (MAC Timer) when

entering a low-power sleep mode.

The main features of the Sleep timer are

the following:

•

24-bit timer up-counter operating

at 32.768 kHz clock

•

24-bit compare

•

Low-power mode operation in

PM2

•

Interrupt and DMA trigger

13.5.1 Timer Operation

This section describes the operation of the

timer.

13.5.1.1 General

The Sleep timer is a 24-bit timer running

on the 32.768 kHz clock. The timer starts

running immediately after a reset and

continues to run uninterrupted. The current

value of the timer can be read from the

SFR registers ST2:ST1:ST0.

13.5.1.2 Timer Compare

A timer compare occurs when the timer

value is equal to the 24-bit compare value.

The compare value is set by writing to the

registers ST2:ST1:ST0. When a timer

compare occurs the interrupt flag STIF

(interrupt 5) is asserted.

The interrupt enable bit for the ST interrupt

is IEN0.STIE and the interrupt flag is

IRCON.STIF.

When operating in power modes PM1 or

PM2, the Sleep timer will be running and

the Sleep timer compare event is used to

wake up the device and return to active

operation in PM0.

The default value of the compare value

after reset is 0xFFFFFF.

The Sleep timer compare can also be

used as a DMA trigger (DMA trigger 9 in

Table 37).

ST2 (0x97) – Sleep Timer 2

Bit

Name

Reset

R/W

Description

7:0

ST2[7:0]

0x00

R/W

Sleep timer count/compare value. When read, this register returns the

high bits [23:16] of the sleep timer count. When writing this register sets

the high bits [23:16] of the compare value. The value read is latched at

the time of reading register ST0. The value written is latched when ST0

is written.

ST1 (0x96) – Sleep Timer 1

Bit

Name

Reset

R/W

Description

7:0

ST1[7:0]

0x00

R/W

Sleep timer count/compare value. When read, this register returns the

middle bits [15:8] of the sleep timer count. When writing this register

sets the middle bits [15:8] of the compare value. The value read is

latched at the time of reading register ST0. The value written is latched

when ST0 is written.

ST0 (0x95) – Sleep Timer 0

Bit

Name

Reset

R/W

Description

7:0

ST0[7:0]

0x00

R/W

Sleep timer count/compare value. When read, this register returns the

low bits [7:0] of the sleep timer count. When writing this register sets the

low bits [7:0] of the compare value.

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