KSZ9563RNXC datasheet(128/226 Pages) MICROCHIP

128 / 226 page

KSZ9563R

DS00002419D-page 128

 2017-2018 Microchip Technology Inc.

5.2

Port Registers

This section details the device’s port registers. All settings are on a per-port basis. Address field “N” specifies the port

number. Valid values for “N” are 1,2,3 for some registers, 3 for MAC port specific registers, and 1,2 for PHY specific

registers.

For an overview of the device’s entire register map, refer to Section 5.0, "Device Registers". For details on the device’s

global registers, refer to Section 5.1, "Global Registers".

5.2.1

PORT N: PORT OPERATION CONTROL REGISTERS (0xN000 - 0xN0FF)

5.2.1.1

Port Default Tag 0 Register

5.2.1.2

Port Default Tag 1 Register

5.2.1.3

Port AVB SR Class 1 Tag 0 Register

Address:

0xN000

Port N: 1-3

Size:

8 bits

Bits

Description

Type

Default

7:0

Port Default 802.1Q Tag [15:8]

Bits [7:5]: Priority Code Point (PCP)

Bit [4]: Drop Eligible Indicator (DEI)

Bits [3:0]: VLAN Identifier (VID) [11:8]

R/W

0x00

Address:

0xN001

Port N: 1-3

Size:

8 bits

Bits

Description

Type

Default

7:0

Port Default 802.1Q tag [7:0]

VLAN Identifier (VID) [7:0]

R/W

0x01

Address:

0xN004

Port N: 1-3

Size:

8 bits

Bits

Description

Type

Default

7:0

SR Class 1 Tag 0

Port custom tag containing:

7-5: User priority bits

4: CFI bit

3-0: SR class VID[11:8] 1

R/W

0x60

KSZ9563RNXC 데이터시트(PDF) 128 Page - Microchip Technology

KSZ9563RNXC 데이터시트(HTML) 128 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL