ST25DV64K datasheet(188/197 Pages) STMICROELECTRONICS

188 / 197 page

Appendix A Bit representation and coding for fast commands ...................... 156

A.1

Bit coding using one subcarrier .................................................156

A.1.1

High data rate ......................................................... 156

A.1.2

Low data rate ......................................................... 156

A.2

ST25DVxxx to VCD frames ....................................................157

A.3

SOF when using one subcarrier ................................................157

A.3.1

High data rate ......................................................... 157

A.3.2

Low data rate ......................................................... 157

A.4

EOF when using one subcarrier ................................................158

A.4.1

High data rate ......................................................... 158

A.4.2

Low data rate ......................................................... 158

Appendix B I²C sequences ......................................................... 159

B.1

Device select codes ..........................................................159

B.2

I²C Byte writing and polling ....................................................159

B.2.1

I2C byte write in user memory............................................. 159

B.2.2

I²C byte writing in dynamic registers and polling ............................... 161

B.2.3

I2C byte write in mailbox and polling ........................................ 162

B.2.4

I2C byte write and polling in system memory.................................. 163

B.3

I2C sequential writing and polling ...............................................164

B.3.1

I2C sequential write in user memory and polling ............................... 164

B.3.2

I2C sequential write in mailbox and polling ................................... 166

B.4

I²C Read current address ......................................................167

B.4.1

I2C current address read in User memory .................................... 167

B.5

I²C random address read ......................................................168

B.5.1

I2C random address read in user memory.................................... 168

B.5.2

I2C Random address read in system memory ................................. 169

B.5.3

I2C Random address read in dynamic registers ............................... 169

B.6

I²C sequential read ...........................................................170

B.6.1

I2C sequential read in user memory ........................................ 170

B.6.2

I2C sequential read in system memory ...................................... 173

B.6.3

I2C sequential read in dynamic registers..................................... 175

B.6.4

I2C sequential read in mailbox ............................................ 177

B.7

I²C password relative sequences ...............................................179

B.7.1

I2C write password ..................................................... 179

B.7.2

I2C present password ................................................... 181

Revision history ..................................................................... 182

ST25DV04K ST25DV16K ST25DV64K

Contents

DS10925 - Rev 11

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