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STM32H7B3AI 데이터시트(PDF) 227 Page - STMicroelectronics |
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STM32H7B3AI 데이터시트(HTML) 227 Page - STMicroelectronics |
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227 / 238 page ![]() Date Revision Changes Added note to td(SDCLKL- SDNE) maximum value in Table 86. SDRAM read timings, Table 87. LPSDR SDRAM read timings, Table 88. SDRAM write timings and Table 89. LPSDR SDRAM write timings. Updated Figure 56. Typical connection diagram using the ADC with FT/TT pins featuring analog switch function and notes below figures. Added note to tSAMP in Table 96. DAC characteristics. Updated Table 108. DFSDM measured timing 1.62-3.6 V. In Table 117. USART characteristics, replaced tsu(SI) and tsu(MI) by tsu(RX), th(SI) and th(MI) by th(RX), tv(SO) and tv(MO) by tv(TX), and th(SO) and th(MO) by th(TX). Updated Section 7.1 LQFP64 package information, Section 7.2 LQFP100 package information, Section 7.3 TFBGA100 package information, Section 7.4.1 Device marking for WLCSP132, Section 7.5.1 Device marking for LQFP144, Section 7.6.1 Device marking for LQFP176, Section 7.7.1 Device marking for TFBGA216, Section 7.8 TFBGA225 package information including Figure 105. TFBGA225 marking example (package top view), Section 7.9 UFBGA169 package information and Section 7.10 UFBGA(176+25) package information. Added Section Important security notice. STM32H7B3xI DS13139 - Rev 8 page 227/238 |
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