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STM32U545NET6QTR 데이터시트(PDF) 227 Page - STMicroelectronics

부품명 STM32U545NET6QTR
상세설명  Ultra-low-power Arm® Cortex®-M33 MCUTrustZone®FPU,240 DMIPS, 512 KB flash memory, 274 KB SRAM, crypto
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STM32U545NET6QTR 데이터시트(HTML) 227 Page - STMicroelectronics

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DS14216 Rev 1
227/283
STM32U545xx
Electrical characteristics
258
See Figure 37: ADC accuracy characteristics, Figure 38: Typical connection diagram when
using the ADC with FT/TT pins featuring analog switch function and General PCB design
guidelines.
6 bits (cont’d)
470
49
3.5
3.5
680
61
1000
79
7.5
1500
106
7.5
2200
146
12.5
3300
207
4700
286
12.5
19.5
6800
404
19.5
39.5
10000
584
39.5
22000
1250
79.5
79.5
33000
1853
814.5
47000
2607
814.5
1. Specified by design. Not tested in production.
2. BOOSTEN and ANASWVDD configured properly according to VDD and VDDA values.
3. Values without external capacitor.
Table 107. Maximum RAIN for 12-bit ADC4(1)(2)(3) (continued)
Resolution
RAIN max (Ω)
Sampling time [ns]
Sampling cycle at 35 MHz
Sampling cycle at 55 MHz
Table 108. 12-bit ADC4 accuracy(1)(2) (3)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
ET
Total unadjusted error
-
-
±3
±7.5
LSB
EO
Offset error
-
-
±2
±5.5
EG
Gain error
-
-
±2
±6.5
ED
Differential linearity error
-
-
-0.9/+1
-0.9/+1.5
EL
Integral linearity error
-
-
±2
±3.5
ENOB
Effective number of bits
-
9.9
10.9
-
bits
SINAD
Signal-to-noise and distortion ratio
-
61.4
67.4
-
dB
SNR
Signal-to-noise ratio
-
61.6
67.5
-
THD
Total harmonic distortion
-
-
-74
-70
1. Evaluated by characterization for BGA packages. Not tested in production. The values for LQFP packages may differ.
2. ADC DC accuracy values are measured after the internal calibration.
3. The I/O analog switch voltage booster is enabled when VDDA < 2.4 V (BOOSTEN = 1 in SYSCFG_CFGR1 when
VDDA < 2.4 V). This switch is disabled when VDDA ≥ 2.4 V. Resolution = 12 bits, no oversampling.



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