STM32H7 datasheet(283/357 Pages) STMICROELECTRONICS

283 / 357 page

DS12110 Rev 10

283/357

STM32H742xI/G STM32H743xI/G

Electrical characteristics (rev V)

320

Figure 92. ADC accuracy characteristics

Figure 93. Typical connection diagram when using the ADC with FT/TT pins

featuring analog switch function

1. Refer to Section 7.3.20: 16-bit ADC characteristics for the values of RAIN and CADC.

2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the

pad capacitance (refer to Table 157: I/O static characteristics for the value of the pad capacitance). A high

Cparasitic value downgrades conversion accuracy. To remedy this, fADC should be reduced.

3. Refer to Table 157: I/O static characteristics for the value of Ilkg.

4. Refer to Figure 68: Power supply scheme.

MSv19880V6

(1) Example of an actual transfer curve

(2) Ideal transfer curve

(3) End-point correlation line

n = ADC resolution

ET = total unadjusted error: maximum deviation

between the actual and ideal transfer curves

EO = offset error: maximum deviation between the first

actual transition and the first ideal one

EG = gain error: deviation between the last ideal

transition and the last actual one

ED = differential linearity error: maximum deviation

between actual steps and the ideal one

EL = integral linearity error: maximum deviation between

any actual transition and the end point correlation line

n-1

Output code

VSSA

n-2

n-3

VREF+ (VDDA)

1 LSB ideal

(1)

(2)

(3)

(or

)]

[1LSB =

VDDA

VREF+

MSv67871V3

Sample-and-hold ADC converter

Converter

Cparasitic

(2)

Ilkg

(3)

CADC

VDDA

(4)

RAIN

(1)

VAIN

RADC

VREF+

(4)

VSSA

I/O

analog

switch

Sampling

switch with

multiplexing

VSS

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