STM32H7 datasheet(295/357 Pages) STMICROELECTRONICS

295 / 357 page

DS12110 Rev 10

295/357

STM32H742xI/G STM32H743xI/G

Electrical characteristics (rev V)

320

7.3.28

Digital filter for Sigma-Delta Modulators (DFSDM) characteristics

Unless otherwise specified, the parameters given in Table 198 for DFSDM are derived from

tests performed under the ambient temperature, fPCLKx frequency and supply voltage

conditions summarized in Table 122: General operating conditions.

•

Output speed is set to OSPEEDRy[1:0] = 10

•

Capacitive load CL = 30 pF

•

Measurement points are done at CMOS levels: 0.5VDD

•

VOS level set to VOS1

Refer to Section 7.3.15: I/O port characteristics for more details on the input/output alternate

function characteristics (DìFSDM_CKINx, DFSDM_DATINx, DFSDM_CKOUT for DFSDM).

PGA BW

PGA bandwidth for

different non inverting gain

Gain=2

GBW/2

MHz

Gain=4

GBW/4

Gain=8

GBW/8

Gain=16

GBW/16

PGA bandwidth for

different inverting gain

Gain = -1

5.00

MHz

Gain = -3

3.00

Gain = -7

1.50

Gain = -15

0.80

Voltage noise density

1 KHz

output loaded

with 4 kΩ

-140

nV/√

10 KHz

-55

IDDA(OPAMP)

OPAMP consumption from

VDDA

Normal

mode

no Load,

quiescent mode,

follower

570

1000

µA

High-

speed

mode

610

1200

RLOAD is the resistive load connected to VSSA or to VDDA.

2. R2 is the internal resistance between the OPAMP output and th OPAMP inverting input. R1 is the internal resistance

between the OPAMP inverting input and ground. PGA gain = 1 + R2/R1.

Table 197. Operational amplifier characteristics (continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

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