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CS5535 데이터시트(PDF) 181 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
부품명 CS5535
상세설명  Geode??CS5535 I/O Companion Multi-Function South Bridge
PDF  555 Pages
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제조업체  NSC [National Semiconductor (TI)]
홈페이지  http://www.national.com
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CS5535 데이터시트(HTML) 181 Page - National Semiconductor (TI)

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TAP Controller Functional Description (Continued)
4.20.1 EXTEST
The EXTEST instruction accesses the boundary scan
chain around the chip and controls the pad logic such that
the boundary scan data will control the data and enable
signals for the pads. IEEE 1149.1 requires that an all-zero
instruction access the boundary scan chain.
4.20.2 TAPSCAN
These instructions enable JTAG access to the internal scan
associated with a particular CCU clock. TCK will then pro-
vide the Scan clock to the CCU so that shifting occurs cor-
rectly during the Shift-DR state of the TAP. (See Figure 4-
64 and Figure 4-65.)
4.20.3 TAPFUNC
These instructions connect TDI and TDO to the 1-bit
bypass register during DR access. They are useful in that
during the Capture-DR state, one functional clock can be
applied to the specific CCU clock indicated by the instruc-
tion. This mode works well with the FS2 JTAG control soft-
ware available with CS5535. The Scan Enable signal to the
block will be inactive during this clock.
Figure 4-64. TAP Controller and Parallel Scan Mode
Test Mode = 1
Scan In
Scan Out
Pad
Pad
GeodeLink™ Device
TAP
Scan In
Pad



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