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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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CS5535 데이터시트(PDF) 399 Page - National Semiconductor (TI) |
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CS5535 데이터시트(HTML) 399 Page - National Semiconductor (TI) |
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399 / 555 page  Revision 0.8 399 www.national.com UART/IR Controller Register Descriptions (Continued) 5.12.10.6 IR Interface Configuration 4 Register (IRCFG4) IRCFG4 configures the receiver data path. I/O Offset 07h Type R/W Reset Value 00h IRCFG4 Register Map 76 54 32 10 RSVD IRSL0_DS RXINV IRSL21_DS RSVD IRCFG4 Bit Descriptions Bit Name Description 7:6 RSVD Reserved. Must be written 0. 5 IRSL0_DS IRSL0/IRRX2 Pin Direction Select. This bit determines the direction of the UART[x]_IRSL0/IRRX2 pin. See Table 5-51. 0: Pin direction is input (UART[x]_IRRX2). 1: Pin direction is output (UART[x]_IRSL0). 4RXINV IRRX Signal Invert. This bit supports optical transceivers with receive signals of oppo- site polarity (active high instead of active low). When set to 1, an inverter is placed in the receiver input signal path. 3 IRSL21_DS Reserved. Must be written 1. 2:0 RSVD Reserved. Must be written 0. Table 5-51. IR Receive Input Selection IRSL0_DS (IRCFG4, bit 5) AUX_IRRX (IRCR2, bit 4) Selected IRRX 0 0 IRRX1 0 1 IRRX2 1 0 IRRX1 1 1 None Selected |
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