CS5535 datasheet(133/555 Pages) NSC

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4.12 DIRECT MEMORY ACCESS MODULE

The Direct Memory Access (DMA) module supports indus-

try standard DMA architecture using two 8237-compatible

DMA controllers in cascaded configuration. Figure 4-37

shows the DMA module partitioning. It consists of two stan-

dard 8237 DMA controllers, a bus interface, address map-

per, and source mapper.

Features

• 32-bit address range support via high page registers.

• Supports the standard 7-channel DMA configuration, out

of which the four 8-bit channels are used.

• DMA mapper to route DMA sources to the four 8-bit

DMA channels.

• DMA sources to come from the LPC bus, and come from

transmit and receive from the two UARTs.

• Allow the data bus to be released in between DMA

transfers during demand or bulk mode to allow transfers

to the DMA module or the module doing DMA transfers.

4.12.1 DMA Mapper Source Selection

For each 8-bit DMA channel, the DMA mapper allows the

DMA request to come from a number of sources. Table 4-

21 shows how the DMA mapper register select field selects

the appropriate DMA source.

When LPC is selected as the DMA source for DMA Chan-

nel 0, the source is LPC DMA Channel 0. Similarly, when

LPC is selected as the source for DMA Channel 1, 2, or 3,

then the DMA sources for those three DMA channels are

respectively LPC DMA Channels 1, 2, and 3. Therefore,

LPC DMA Channel 0 can only be mapped to DMA Channel

0, LPC DMA Channel 1 can only be mapped to DMA Chan-

nel 1, etc.

Figure 4-37. DMA Module Block Diagram

Table 4-21. DMA Source Selection

Source Selector

Value from DMA

Mapper

DMA Source

None (DMA channel off)

1UART1 Transmit

UART1 Receive

3UART2 Transmit

UART2 Receive

Reserved (not active)

7LPC

8237

Data LBus I/F

LPC I/F

DMA R/W Controls

DMA Requests

DMA Acks

Bus

Interface

and Registers

LPC and DMA

Interfaces with

DMA mapper

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