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ST72324 데이터시트(PDF) 142 Page - STMicroelectronics |
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ST72324 데이터시트(HTML) 142 Page - STMicroelectronics |
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142 / 163 page ![]() ST72324 142/163 12.13 10-BIT ADC CHARACTERISTICS Subject to general operating conditions for VDD, fCPU, and TA unless otherwise specified. Notes: 1. Any added external serial resistor will downgrade the ADC accuracy (especially for resistance greater than 10k Ω). Data based on characterization results, not tested in production. 2.For Flash devices: injecting negative current on any of the analog input pins significantly reduces the accuracy of any conversion being performed on any analog input. Analog pins of ST72F324 devices can be protected against negative injection by adding a Schottky diode (pin to ground). Injecting negative current on digital input pins degrades ADC accu- racy especially if performed on a pin close to the analog input pins. Any positive injection current within the limits specified for IINJ(PIN) and ΣIINJ(PIN) in Section 12.9 does not affect the ADC accuracy. Symbol Parameter Conditions Min Typ Max Unit fADC ADC clock frequency 0.4 2 MHz VAREF Analog reference voltage 0.7*VDD ≤VAREF ≤VDD 3.8 VDD V VAIN Conversion voltage range 1) VSSA VAREF Ilkg Positive input leakage current for analog input2) -40°C ≤T A≤+85°C ±250 nA +85°C ≤T A≤+125°C ±1 µA RAIN External input impedance see Figure 83 and Figure 842)3)4) k Ω CAIN External capacitor on analog input pF fAIN Variation freq. of analog input signal Hz CADC Internal sample and hold capacitor 12 pF tADC Conversion time (Sample+Hold) fCPU=8MHz, SPEED=0 fADC=2MHz 7.5 µs tADC - No of sample capacitor loading cycles - No. of Hold conversion cycles 4 11 1/fADC 1 |
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