ST92F124 datasheet(331/429 Pages) STMICROELECTRONICS

부품명	ST92F124

상세설명	8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM, E3 TM(EMULATED EEPROM), CAN 2.0B AND J1850 BLPD

PDF	429 Pages

Scroll/Zoom	100%

제조업체	STMICROELECTRONICS [STMicroelectronics]

홈페이지	http://www.st.com

Logo

331 / 429 page

331/429

CONTROLLER AREA NETWORK (bxCAN)

CONTROLLER AREA NETWORK (Cont’d)

10.10.5.2

Time

Triggered

Communication

Mode

In this mode, the internal counter of the CAN hard-

ware is activated and used to generate the Time

Stamp value stored in the MTSRH and MTSRL

registers. The internal counter is captured on the

sample point of the Start Of Frame bit in both re-

ception and transmission.

10.10.5.3 Reception Handling

For the reception of CAN messages, three

mailboxes organized as a FIFO are provided. In

order to save CPU load, simplify the software and

guarantee data consistency, the FIFO is managed

completely by hardware. The application accesses

the messages stored in the FIFO through the FIFO

output mailbox.

Valid Message

A received message is considered as valid when it

has been received correctly according to the CAN

protocol (no error until the last but one bit of the

EOF field) and It passed through the identifier fil-

tering successfully, see Section 10.10.5.4 Identifi-

er Filtering.

ST92F124 데이터시트(PDF) 331 Page - STMicroelectronics