| 전자부품 데이터시트 검색엔진 |
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PIC16F946-E/MLQTP 데이터시트(PDF) 155 Page - Microchip Technology |
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PIC16F946-E/MLQTP 데이터시트(HTML) 155 Page - Microchip Technology |
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155 / 330 page ![]() © 2007 Microchip Technology Inc. DS41250F-page 153 PIC16F913/914/916/917/946 10.8 LCD Waveform Generation LCD waveforms are generated so that the net AC voltage across the dark pixel should be maximized and the net AC voltage across the clear pixel should be minimized. The net DC voltage across any pixel should be zero. The COM signal represents the time slice for each common, while the SEG contains the pixel data. The pixel signal (COM-SEG) will have no DC component and it can take only one of the two rms values. The higher rms value will create a dark pixel and a lower rms value will create a clear pixel. As the number of commons increases, the delta between the two rms values decreases. The delta represents the maximum contrast that the display can have. The LCDs can be driven by two types of waveform: Type-A and Type-B. In Type-A waveform, the phase changes within each common type, whereas in Type-B waveform, the phase changes on each frame boundary. Thus, Type-A waveform maintains 0 VDC over a single frame, whereas Type-B waveform takes two frames. Figure 10-6 through Figure 10-16 provide waveforms for static, half-multiplex, one-third-multiplex and quarter-multiplex drives for Type-A and Type-B waveforms. FIGURE 10-6: TYPE-A/TYPE-B WAVEFORMS IN STATIC DRIVE Note 1: If Sleep has to be executed with LCD Sleep disabled (LCDCON<SLPEN> is ‘1’), then care must be taken to execute Sleep only when VDC on all the pixels is ‘0’. 2: When the LCD clock source is FOSC/8192, if Sleep is executed, irrespective of the LCDCON<SLPEN> setting, the LCD goes into Sleep. Thus, take care to see that VDC on all pixels is ‘0’ when Sleep is executed. V1 V0 COM0 SEG0 COM0-SEG0 COM0-SEG1 SEG1 V1 V0 V1 V0 V0 V1 -V1 V0 1 Frame COM0 |
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