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PIC18F23K20-E/SOSQTP 데이터시트(PDF) 253 Page - Microchip Technology

부품명 PIC18F23K20-E/SOSQTP
상세설명  28/40/44-Pin Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
PDF  420 Pages
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F23K20-E/SOSQTP 데이터시트(HTML) 253 Page - Microchip Technology

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© 2007 Microchip Technology Inc.
Advance Information
DS41303B-page 251
PIC18F2XK20/4XK20
FIGURE 18-12:
SYNCHRONOUS RECEPTION (MASTER MODE, SREN)
TABLE 18-8:
REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER RECEPTION
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on page
INTCON
GIE/GIEH PEIE/GIEL
TMR0IE
INT0IE
RBIE
TMR0IF
INT0IF
RBIF
57
PIR1
PSPIF(1)
ADIF
RCIF
TXIF
SSPIF
CCP1IF
TMR2IF
TMR1IF
60
PIE1
PSPIE(1)
ADIE
RCIE
TXIE
SSPIE
CCP1IE
TMR2IE
TMR1IE
60
IPR1
PSPIP(1)
ADIP
RCIP
TXIP
SSPIP
CCP1IP
TMR2IP
TMR1IP
60
RCSTA
SPEN
RX9
SREN
CREN
ADDEN
FERR
OERR
RX9D
59
RCREG
EUSART Receive Register
59
TXSTA
CSRC
TX9
TXEN
SYNC
SENDB
BRGH
TRMT
TX9D
59
BAUDCTL
ABDOVF
RCIDL
DTRXP
CKTXP
BRG16
—
WUE
ABDEN
59
SPBRGH
EUSART Baud Rate Generator Register, High Byte
59
SPBRG
EUSART Baud Rate Generator Register, Low Byte
59
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used for synchronous master reception.
Note 1:
Reserved in 28-pin devices; always maintain these bits clear.
CREN bit
RX/DT
Write to
bit SREN
SREN bit
RCIF bit
(Interrupt)
Read
RXREG
‘0’
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
bit 6
bit 7
‘0’
Note:
Timing diagram demonstrates Sync Master mode with bit SREN = 1 and bit BRGH = 0.
TX/CK pin
TX/CK pin
pin
(SCKP = 0)
(SCKP = 1)



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