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DSPIC30F6015T-30E/PT 데이터시트(PDF) 26 Page - Microchip Technology |
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DSPIC30F6015T-30E/PT 데이터시트(HTML) 26 Page - Microchip Technology |
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26 / 236 page  dsPIC30F6010A/6015 DS70150C-page 24 © 2007 Microchip Technology Inc. FIGURE 3-4: PROGRAM DATA TABLE ACCESS (MOST SIGNIFICANT BYTE) 3.1.2 DATA ACCESS FROM PROGRAM MEMORY USING PROGRAM SPACE VISIBILITY The upper 32 Kbytes of data space may optionally be mapped into any 16K word program space page. This provides transparent access of stored constant data from X data space, without the need to use special instructions (i.e., TBLRDL/H, TBLWTL/H instructions). Program space access through the data space occurs if the MSb of the data space EA is set and program space visibility is enabled, by setting the PSV bit in the Core Control register (CORCON). The functions of CORCON are discussed in Section 2.4 “DSP Engine”. Data accesses to this area add an additional cycle to the instruction being executed, since two program memory fetches are required. Note that the upper half of addressable data space is always part of the X data space. Therefore, when a DSP operation uses program space mapping to access this memory region, Y data space should typically con- tain state (variable) data for DSP operations, whereas X data space should typically contain coefficient (constant) data. Although each data space address, 0x8000 and higher, maps directly into a corresponding program memory address (see Figure 3-5), only the lower 16 bits of the 24-bit program word are used to contain the data. The upper 8 bits should be programmed to force an illegal instruction to maintain machine robustness. Refer to the “dsPIC30F/33F Programmers Reference Manual” (DS70157) for details on instruction encoding. Note that by incrementing the PC by 2 for each program memory word, the Least Significant 15 bits of data space addresses directly map to the Least Signif- icant 15 bits in the corresponding program space addresses. The remaining bits are provided by the Program Space Visibility Page register, PSVPAG<7:0>, as shown in Figure 3-5. For instructions that use PSV which are executed outside a REPEAT loop: • The following instructions will require one instruc- tion cycle in addition to the specified execution time: - MAC class of instructions with data operand prefetch - MOV instructions - MOV.D instructions • All other instructions will require two instruction cycles in addition to the specified execution time of the instruction. For instructions that use PSV which are executed inside a REPEAT loop: • The following instances will require two instruction cycles in addition to the specified execution time of the instruction: - Execution in the first iteration - Execution in the last iteration - Execution prior to exiting the loop due to an interrupt - Execution upon re-entering the loop after an interrupt is serviced • Any other iteration of the REPEAT loop will allow the instruction, accessing data using PSV, to execute in a single cycle. 0 8 16 PC Address 0x000000 0x000002 0x000004 0x000006 23 00000000 00000000 00000000 00000000 Program Memory ‘Phantom’ Byte (Read as ‘0’) TBLRDH.W TBLRDH.B (Wn<0> = 1) TBLRDH.B (Wn<0> = 0) Note: PSV access is temporarily disabled during table reads/writes. |
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