ST72324BK2 datasheet(186/188 Pages) STMICROELECTRONICS

186 / 188 page

Revision history

ST72324B

186/188

Revision history

Table 126.

Document revision history

Date

Revision

Changes

05-May-2004

2.0

Merged ST72F324 Flash with ST72324B ROM datasheet.

Vt POR max modified in Section 12.4 on page 140

Added Figure 79 on page 159

Modified VAREF min in “10-bit ADC characteristics” on page 163

Modified I INJ for PB0 in Section 12.9 on page 153

Added “Clearing active interrupts outside interrupt routine” on page 182

Modified “32K ROM DEVICES ONLY” on page 165

30-Mar-2005

Removed Clock Security System (CSS) throughout document

Added notes on ST72F324B 8K/16K Flash devices in Table 27

Corrected MCO description in Section 10.2 on page 64

Modified VtPOR in Section 12.4 on page 140

Static current consumption modified in Section 12.9 on page 153

Updated footnote and Figure 78 on page 158 and Figure 79 on page 159

Modified Soldering information in Section 13.6

Updated Section 14 on page 172

Added Table 27

Modified Figure 8 on page 20 and note 4 in “Flash program memory” on

page 18

Added limitation on ICC entry mode with 39 pulses to “Known limitations”

on page 180

Added Section 16 on page 166 for ST72F324B 8K/16K Flash devices

Modified “Internal Sales Types on box label” in Table 29 on page 157

12-Sep-2005

Removed notes related to ST72F324, refer to datasheet rev 3 for

specifications on older devices.

Note: This datasheet rev refers only to ST72F324B and ST72324B.

Changed character transmission procedure in Section on page 107

Updated Vt POR max in Section 12.4 on page 140

Updated Current Consumption for in Section 12.5 on page 141

Added oscillator diagram and table to Section 12.6.3 on page 145

Increased Data retention max. parameter in Section 12.7.2 on page 148

Updated ordering Section 14.3 on page 155 and Section 14.5 on page

157

Updated Development tools Section 14.3 on page 178

Added “external interrupt missed” in Section 15.1 on page 180

06-Feb-2006

Added description of SICSR register at address 2Bh in Table 2 on

page 15

Changed description on port PF2 to add internal pull-up in Section 9.5.1

on page 58

Highlighted note in SPI “Master mode operation” on page 94

Changed “Static and dynamic Latch-Up” on page 152

Added note 5 on analog input static current consumption “General

characteristics” on page 153

Updated notes in “Thermal characteristics” on page 171

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