UPSD3422EB40U6 datasheet(164/293 Pages) STMICROELECTRONICS

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USB interface

uPSD34xx

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USB Endpoint0 Status (USTA)

The USB Endpoint0 Status register (see Table 81) provides the status for events that

occur on the USB that are directed to endpoint0.

Table 81.

USB endpoint0 status (USTA 0EDh, reset value 00h)

Important note: Disabling and enabling the USB SIE using the USBEN bit in the UCTL

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

–

RCVT

SETUP

OUT

Bit

Symbol

R/W

Definition

–

Reserved

–

Reserved

–

Reserved

–

Reserved

3RCVT

Received Data Toggle Bit

This bit indicates the toggle bit of the received data packet:

0 = Data0, and

1 = Data1

2SETUP

R/W

SETUP Token Detect Bit

This bit is set when Endpoint0 receives a SETUP token. This

bit is not cleared when Endpoint0 receives an IN or OUT token

following the SETUP token that set this bit. This bit is cleared

by software or a reset.

1IN

IN Token Detect Bit

This bit is set when Endpoint0 receives an IN token. This bit is

cleared when Endpoint0 receives a SETUP or OUT token.

0OUT

OUT Token Detect Bit

This bit is set when Endpoint0 receives an OUT token. This bit

is cleared when Endpoint0 receives a SETUP or IN token.

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