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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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L9679P 데이터시트(PDF) 249 Page - STMicroelectronics |
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L9679P 데이터시트(HTML) 249 Page - STMicroelectronics |
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249 / 279 page  DS11627 Rev 7 249/279 L9679P Electrical characteristics 278 Figure 72. Deployment drivers diagram 31 LCSx Clock Spring Inductance Design Info 0 - 42.9 µH 32 kL_CS1 – L_CS2 Clock Spring Coupling Design Info 0.739 - 0.903 - 33 LEMI Squib/pyroswitch EMI protection Design Info 0 - 7.7 µH 1. In case of an unsupplied device and shorted deployment pins (e.g. to battery voltage), the dynamic reverse current through the high side power stage depends on CSSxy. 2. LDEPL could be calculated in the following way: Non-Clock Spring Loops: LDEPL(max) = LWire(10m*2) + LEMI = (3.6uH/m * 10m) + 7.7uH =43.7uH Clock Spring Loops: LWire(3m*2) + 2*LCSx + LEMI - (2*kL_CX*SQRT(L_CS1*L_CS2)) = = (3.6uH/m * 3m) + 2 * 42.9uH + 7.7uH - (2 * 0.739 * 42.9uH) = 40.9uHClock Spring Loops with short to ground LDEPL(max) = LWire(3m) + LCSx + LEMI = (1.8uH/m * 3m) + 42.9uH + 7.7uH = 56uH. Table 56. Deployment drivers – DC specifications (continued) No Symbol Parameter Comments / Conditions Min Typ Max Unit GAPGPS01153 ESD/EMI Protection Squib EMI Protection Squib Load R_Squib L_EMI L_CS1 R_CS1 L_CS2 R_CS2 Clock Spring Impedance System Wiring Impedance R_Wire 1 Wire Lenght (m) kL_CS1 - L_CS2 L_Wire 1 R_Wire 2 L_Wire 2 C_SFx SFx SRx C_SRx |
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