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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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L9945 데이터시트(PDF) 127 Page - STMicroelectronics |
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L9945 데이터시트(HTML) 127 Page - STMicroelectronics |
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127 / 144 page  Figure 36. Deglitch and settling filter times for OFF state diagnostics: (left) STG detection on LS; (right) STB detection on HS t t t t t t Transient fault t t GADG1303170949PS No OL/STG transition ON → OFF DIAG t FIL_OFF t OL V LVT V LS OFF Diagnostics Vout Fast charge fault Transient counter Settling filter Deglitch STG fault Permanent No OL/STB transition ON → OFF discharge Fast counter Settling filter Deglitch DIAG t FIL_OFF t OL V LVT V HS OFF Diagnostics Vout STB fault Permanent Note: Vout corresponds to DRNx pin for LS NMOS and HS PMOS configurations, while it's SNGPx pin for HS NMOS configuration. 6.4.2 Diagnostic thresholds The diagnostic thresholds are fixed, as shown in the table below. They have been designed in tracking, thus both spreading in the same direction. Table 45. OFF state diagnostic thresholds Symbol Parameter Min. Max. Unit VLVT Threshold for: • STG detection in LS config (Vout < VLVT) • OL detection in HS/LS config (VLVT < Vout < VOL) 1.9 2.3 V VOL Threshold for: • STB detection in HS config (Vout > VOL) • OL detection in HS/LS config (VLVT < Vout < VOL) 2.8 3.4 V Note: Vout corresponds to DRNx pin for LS NMOS and HS PMOS configurations, while it's SNGPx pin for HS NMOS configuration. 6.4.3 Internal regulator for open load (OL) detection Each channel features an internal regulator with limited current capability that regulates the output node voltage Vout around VOUT_OL, which falls in the middle of the [VLVT; VOL] range. OL regulators are always ON, independently on the ENABLE_DIAGNOSTIC bit value. L9945 Safety & diagnostics DS12275 - Rev 10 page 127/144 |
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