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ADE7166 데이터시트(PDF) 140 Page - Analog Devices

부품명 ADE7166
상세설명  Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver
PDF  144 Pages
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ADE7166 데이터시트(HTML) 140 Page - Analog Devices

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ADE7566/ADE7569/ADE7166/ADE7169
Rev. A | Page 140 of 144
Table 156. Port 0 Alternate Functions
Pin No.
Alternate Function
Alternate Function Enable
BCTRL External Battery Control Input
Set INT1PROG[2:0] = X01 in the Interrupt Pins Configuration SFR (INTPR,
0xFF).
INT1 External Interrupt
Set EX1 in the Interrupt Enable SFR (IE, 0xA8).
P0.0
INT1 Wake-up from PSM2 Operating Mode
Set INT1PROG[2:0] = 11X in the Interrupt Pins Configuration SFR (INTPR,
0xFF).
P0.1
FP19 LCD Segment Pin
Set FP19EN in the LCD Segment Enable 2 SFR (LCDSEGE2, 0xED).
P0.2
CF1 ADE Calibration Frequency Output
Clear the DISCF1 bit in the ADE energy measurement internal MODE1 register
(0x0B).
P0.3
CF2 ADE Calibration Frequency Output
Clear the DISCF2 bit in the ADE energy measurement internal MODE1 register
(0x0B).
MOSI SPI Data Line
Set the SCPS bit in the Configuration SFR (CFG, 0xAF) and set the SPIEN bit in
the SPI Configuration SFR 2 (SPIMOD2, 0xE9).
P0.4
SDATA I2C Data Line
Clear the SCPS bit in the Configuration SFR (CFG, 0xAF) and set the I2CEN bit
in the I2C Mode SFR (I2CMOD, 0xE8).
P0.5
MISO SPI Data Line
Set the SCPS bit in the Configuration SFR (CFG, 0xAF) and set the SPIEN bit in
the SPI Configuration SFR 2 (SPIMOD2, 0xE9).
P0.6
SCLK Serial Clock for I2C or SPI
Set the I2CEN bit in the I2C Mode SFR (I2CMOD, 0xE8) or the SPIEN bit in the
SPI Configuration SFR 2 (SPIMOD2, 0xE9) to enable the I2C or SPI interface.
T0 Timer0 Input
Set the C/T0 bit in the Timer/Counter 0 and Timer/Counter 1 Mode SFR (TMOD,
0x89) to enable T0 as an external event counter.
SS SPI Slave Select Input for SPI in Slave Mode
Set the SS_EN bit in the SPI Configuration SFR 1 (SPIMOD1, 0xE8).
SS SPI Slave Select Output for SPI in Master Mode
Set the SPIMS_b bit in the SPI Configuration SFR 2 (SPIMOD2, 0xE9).
P0.7
T1 Timer 1 Input
Set the C/T1 bit in the Timer/Counter 0 and Timer/Counter 1 Mode SFR (TMOD,
0x89) to enable T1 as an external event counter.
Table 157. Port 1 Alternate Functions
Pin No.
Alternate Function
Alternate Function Enable
RxD Receiver Data Input for UART
Set the REN bit in the Serial Communications Control Register Bit Description
SFR (SCON, 0x98).
P1.0
Rx Edge Wake-up from PSM2 Operating Mode
Set RXPROG[1:0] = 11 in the Peripheral Configuration SFR (PERIPH, 0xF4).
P1.1
TxD Transmitter Data Output for UART
This pin becomes TxD as soon as data is written into SBUF.
P1.2
FP25 LCD Segment Pin
Set FP25EN in the LCD Segment Enable SFR (LCDSEGE, 0x97).
FP24 LCD Segment Pin
Set FP24EN in the LCD Segment Enable SFR (LCDSEGE, 0x97).
P1.3
T2EX Timer 2 Control Input
Set EXEN2 in the Timer/Counter 2 Control SFR (T2CON, 0xC8).
FP23 LCD Segment Pin
Set FP23EN in the LCD Segment Enable SFR (LCDSEGE, 0x97).
P1.4
T2 Timer 2 Input
Set the C/T2 bit in the Timer/Counter 2 Control SFR (T2CON, 0xC8) to enable T2
as an external event counter.
P1.5
FP22 LCD Segment Pin
Set FP22EN in the LCD Segment Enable SFR (LCDSEGE, 0x97).
P1.6
FP21 LCD Segment Pin
Set FP21EN in the LCD Segment Enable SFR (LCDSEGE, 0x97).
P1.7
FP20 LCD Segment Pin
Set FP20EN in the LCD Segment Enable SFR (LCDSEGE, 0x97).
Table 158. Port 2 Alternate Functions
Pin No.
Alternate Function
Alternate Function Enable
P2.0
FP18 LCD Segment Pin
Set FP18EN in the LCD Segment Enable 2 SFR (LCDSEGE2, 0xED).
P2.1
FP17 LCD Segment Pin
Set FP17EN in the LCD Segment Enable 2 SFR (LCDSEGE2, 0xED).
P2.2
FP16 LCD Segment Pin
Set FP16EN in the LCD Segment Enable 2 SFR (LCDSEGE2, 0xED).
P2.3
SDEN serial download pin sampled on reset. P2.3 is an output only.
Enabled by default.



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