STM32F301C6 datasheet(108/141 Pages) STMICROELECTRONICS

108 / 141 page

Electrical characteristics

STM32F301x6 STM32F301x8

108/141

DS9895 Rev 8

Figure 32. ADC accuracy characteristics

Figure 33. Typical connection diagram using the ADC

1. Refer to Table 63 for the values of RAIN.

2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the

pad capacitance (roughly 7 pF). A high Cparasitic value will downgrade conversion accuracy. To remedy

this, fADC should be reduced.

General PCB design guidelines

Power supply decoupling should be performed as shown in Figure 12. The 10 nF capacitor

should be ceramic (good quality) and it should be placed as close as possible to the chip.

1LSBIDEAL

(1) Example of an actual transfer curve

(2) The ideal transfer curve

(3) End point correlation line

ET=Total Unadjusted Error: maximum deviation

between the actual and the ideal transfer curves.

EO=Offset Error: deviation between the first actual

transition and the first ideal one.

EG=Gain Error: deviation between the last ideal

transition and the last actual one.

ED=Differential Linearity Error: maximum deviation

between actual steps and the ideal one.

EL=Integral Linearity Error: maximum deviation

between any actual transition and the end point

correlation line.

4095

4094

4093

456

4093 4094 4095 4096

(1)

(2)

(3)

VDDA

VSSA

VDDA

4096

1LSBIDEAL =

MS34980V1

12-bit

converter

Sample and hold ADC

converter

RAIN(1)

AINx

VAIN

Cparasitic

VDD

0.6 V

IL ± 1 μA

RADC

CADC

MS19881V3

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