ST7FOXK2 datasheet(114/226 Pages) STMICROELECTRONICS

114 / 226 page

On-chip peripherals

ST7FOXF1, ST7FOXK1, ST7FOXK2

114/226

10.3.5

Interrupts

The TBxF and ICF interrupt events are connected to separate interrupt vectors (see

Section 7: Interrupts).

They generate an interrupt if the enable bit is set in the LTCSR1 or LTCSR2 register and the

interrupt mask in the CC register is reset (RIM instruction).

10.3.6

Lite Timer Control/Status register 2 (LTCSR2)

Reset value: 0000 0000 (00h)

Bits 7:2 = Reserved, must be kept cleared.

Bit 1 = TB2IE Timebase 2 Interrupt enable bit

This bit is set and cleared by software.

0: Timebase (TB2) interrupt disabled

1: Timebase (TB2) interrupt enabled

Bit 0 = TB2F Timebase 2 Interrupt flag

This bit is set by hardware and cleared by software reading the LTCSR register. Writing

to this bit has no effect.

0: No Counter 2 overflow

1: A Counter 2 overflow has occurred

Table 40.

Description of interrupt events

Interrupt Event

Event

Flag

Enable

Control

Bit

Exit

from

Wait

Exit

from

Active

Halt

Exit

from

Halt

Timebase 1 Event

TB1F

TB1IE

Yes

Timebase 2 Event

TB2F

TB2IE

IC Event

ICF

ICIE

0000

TB2IE

TB2F

Read / Write

ST7FOXK2 데이터시트(PDF) 114 Page - STMicroelectronics

ST7FOXK2 데이터시트(HTML) 114 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL