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NRF52810-QFAA-R 데이터시트(PDF) 263 Page - Nordic Semiconductor |
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NRF52810-QFAA-R 데이터시트(HTML) 263 Page - Nordic Semiconductor |
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263 / 483 page ![]() Peripherals 100% duty cycle New value load Previously loaded duty cycle 0% duty cycle LOOP.CNT (LOOP.CNT - 1) 1 Loop counter ... last loaded duty cycle maintained Figure 55: Complex sequence (LOOP.CNT>0) starting with SEQ[1] Note that if a sequence is in use in a simple or complex sequence, it must have a length of SEQ[n].CNT > 0 . 6.12.3 Limitations The previous compare value will be repeated if the PWM period is selected to be shorter than the time it takes for the EasyDMA to fetch from RAM and update the internal compare registers. This is to ensure a glitch-free operation even if very short PWM periods are chosen. 6.12.4 Pin configuration The OUT[n] (n=0..3) signals associated to each channel of the PWM module are mapped to physical pins according to the configuration specified in the respective PSEL.OUT[n] registers. If a PSEL.OUT[n].CONNECT is set to Disconnected, the associated PWM module signal will not be connected to any physical pins. The PSEL.OUT[n] registers and their configurations are only used as long as the PWM module is enabled and PWM generation is active (wave counter started), and retained only as long as the device is in System ON mode, see POWER chapter for more information about power modes. To ensure correct behaviour in the PWM module, the pins used by the PWM module must be configured in the GPIO peripheral as described in Recommended GPIO configuration before starting PWM generation on page 264 before enabling the PWM module. The pins' idle state is defined by the OUT registers in the GPIO module. This is to ensure that the pins used by the PWM module are driven correctly, if PWM generation is stopped through a STOP task, the PWM module itself is temporarily disabled, or the device temporarily enters System OFF. This configuration must be retained in the GPIO for the selected IOs as long as the PWM module is supposed to be connected to an external PWM circuit. 4430_161 v1.0 263 |
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