NRF52810-QFAA-R datasheet(322/483 Pages) NORDIC

322 / 483 page

Peripherals

See CLOCK — Clock control on page 83 for more information about clock sources.

6.16.2 Resolution versus overflow and the PRESCALER

Counter increment frequency:

fRTC [kHz] = 32.768 / (PRESCALER + 1 )

The PRESCALER register is read/write when the RTC is stopped. The PRESCALER register is read-only once

the RTC is STARTed. Writing to the PRESCALER register when the RTC is started has no effect.

The PRESCALER is restarted on START, CLEAR and TRIGOVRFLW, that is, the prescaler value is latched to an

internal register (<<PRESC>>) on these tasks.

Examples:

1. Desired COUNTER frequency 100 Hz (10 ms counter period)

PRESCALER = round(32.768 kHz / 100 Hz) - 1 = 327

fRTC = 99.9 Hz

10009.576 μs counter period

2. Desired COUNTER frequency 8 Hz (125 ms counter period)

PRESCALER = round(32.768 kHz / 8 Hz) – 1 = 4095

fRTC = 8 Hz

125 ms counter period

Prescaler

Counter resolution

Overflow

30.517 μs

512 seconds

28-1

7812.5 μs

131072 seconds

212-1

125 ms

582.542 hours

Table 64: RTC resolution versus overflow

6.16.3 COUNTER register

The COUNTER increments on LFCLK when the internal PRESCALER register (<<PRESC>>) is 0x00.

<<PRESC>> is reloaded from the PRESCALER register. If enabled, the TICK event occurs on each increment

of the COUNTER. The TICK event is disabled by default.

SysClk

LFClk

PRESC

<<PRESC>>

0x000

TICK

COUNTER

0x000002

0x000003

0x000

0x000001

0x000000

Figure 76: Timing diagram - COUNTER_PRESCALER_0

4430_161 v1.0

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