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ST72311R 데이터시트(PDF) 145 Page - STMicroelectronics

부품명 ST72311R
상세설명  8-BIT MCU WITH NESTED INTERRUPTS, EEPROM, ADC, 16-BIT TIMERS, 8-BIT PWM ART, SPI, SCI, CAN INTERFACES
PDF  164 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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ST72311R 데이터시트(HTML) 145 Page - STMicroelectronics

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12.8 I/O PORT PIN CHARACTERISTICS
12.8.1 General Characteristics
Subject to general operating condition for VDD,fOSC, and TA unless otherwise specified.
Figure 82. Two typical Applications with unused I/O Pin
Notes:
1. Unless otherwise specified, typical data are based on TA=25°C and VDD=5V.
2. Data based on characterization results, not tested in production.
3. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested.
4. Configuration not recommended, all unused pins must be kept at a fixed voltage: using the output mode of the I/O for
example or an external pull-up or pull-down resistor (see Figure 82). Data based on design simulation and/or technology
characteristics, not tested in production.
5. The RPU pull-up equivalent resistor is based on a resistive transistor. This data is based on characterization results,
not tested in production.
6. To generate an external interrupt, a minimum pulse width has to be applied on an I/O port pin configured as an external
interrupt source.
Symbol
Parameter
Conditions
Min
Typ 1)
Max
Unit
VIL
Input low level voltage 2)
0.3xV
DD
V
VIH
Input high level voltage 2)
0.7xV
DD
Vhys
Schmitt trigger voltage hysteresis 3)
400
mV
IL
Input leakage current
VSS≤VIN≤VDD
±1
µA
IS
Static current consumption 4)
Floating input mode
200
RPU
Weak pull-up equivalent resistor 5)
VIN=VSS
VDD=5V
60
240
k
Ω
CIO
IO pin capacitance
5
pF
tf(IO)out
Output high to low level fall time 2)
CL=50pF
Between 10% and 90%
25
ns
tr(IO)out
Output low to high level rise time 2)
25
tw(IT)in
External interrupt pulse time 6)
1tCPU
10k
Ω
UNUSED I/O PORT
ST72XXX
10k
Ω
UNUSED I/O PORT
ST72XXX
VDD



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