ST72311R datasheet(152/164 Pages) STMICROELECTRONICS

152 / 164 page

ST72311R, ST72511R, ST72512R, ST72532R

152/164

12.12 8-BIT ADC CHARACTERISTICS

Subject to general operating condition for VDD,fOSC, and TA unless otherwise specified.

Figure 91. Typical Application with ADC

Notes:

1. Unless otherwise specified, typical data are based on TA=25°C and VDD-VSS=5V. They are given only as design guide-

lines and are not tested.

2. When VDDA and VSSA pins are not available on the pinout, the ADC refer to VDD and VSS.

3. Any added external serial resistor will downgrade the ADC accuracy (especially for resistance greater than 10k

Ω). Data

based on characterization results, not tested in production.

4. The stabilization time of the AD converter is masked by the first tLOAD. The first conversion after the enable is then

always valid.

Symbol

Parameter

Conditions

Min

Typ 1)

Max

Unit

fADC

ADC clock frequency

MHz

VAIN

Conversion range voltage 2)

VSSA

VDDA

RAIN

External input resistor

15 3)

Ω

RADC

Internal input resistor

1.5

Ω

CADC

Internal sample and hold capacitor

tSTAB

Stabilization time after ADC enable

fCPU=8MHz, fADC=4MHz

0 4)

µs

tLOAD

Sample capacitor loading time

µs

1/fADC

tCONV

Hold conversion time

2.250

µs

1/fADC

AINx

ST72XXX

CIO

0.1

µF

VDD

±1µA

0.6V

RADC

CADC

0.1

µF

SAMPLING SWITCH

VAIN

RAIN

VDDA

VSSA

0.1

µF

VDD

Ω

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