| 전자부품 데이터시트 검색엔진 |
|
ST72324 데이터시트(PDF) 134 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
ST72324 데이터시트(HTML) 134 Page - STMicroelectronics |
|
134 / 161 page ![]() ST72324 134/161 EMC CHARACTERISTICS (Cont’d) True Open Drain Pin Protection The centralized protection (4) is not involved in the discharge of the ESD stresses applied to true open drain pads due to the fact that a P-Buffer and diode to VDD are not implemented. An additional local protection between the pad and VSS (5a & 5b) is implemented to completely absorb the posi- tive ESD discharge. Multisupply Configuration When several types of ground (VSS, VSSA, ...) and power supply (VDD, VAREF, ...) are available for any reason (better noise immunity...), the structure shown in Figure 76 is implemented to protect the device against ESD. Figure 74. Positive Stress on a True Open Drain Pad vs. VSS Figure 75. Negative Stress on a True Open Drain Pad vs. VDD Figure 76. Multisupply Configuration IN VDD VSS (1) (2b) (4) OUT VDD VSS (3b) Main path Path to avoid (5a) (5b) IN VDD VSS (1) (2b) (4) OUT VDD VSS (3b) Main path (3b) (3b) VAREF VSSA VAREF VDD VSS BACK TO BACK DIODE BETWEEN GROUNDS VSSA |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |