 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
ST92F120JR1T 데이터시트(PDF) 312 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
ST92F120JR1T 데이터시트(HTML) 312 Page - STMicroelectronics |
|
|
312 / 320 page  312/320 ST92F120 - ELECTRICAL CHARACTERISTICS I2C/DDC-BUS TIMING TABLE (VDD =5V ± 10%, TA = –40°C to +105°C, CLoad = 50pF, fINTCLK = 24MHz, unless otherwise specified) Note: (1) The device must internally provide a hold time of at least 300 ns for the SDA signal in order to bridge the undefined region of the falling edge of SCL (2) The maximum hold time of the START condition has only to be met if the interface does not stretch the low period of SCL signal Legend: Tck = INTCLK period = OSCIN period when OSCIN is not divided by 2; 2 x OSCIN period when OSCIN is divided by 2; OSCIN period x PLL factor when the PLL is enabled. Cb = total capacitance of one bus line in pF FREQ[ 2:0] = Frequency bits value of I2C Own Address Register 2 (I2COAR2) Symbol Parameter Formula Protocol Specifications Unit Standard I2CFast I2C Min Max Min Max fINTCLK Internal Frequency (Slave Mode) 2.5 MHz fSCL SCL clock frequency 0 100 0 400 kHz TBUF Bus free time between a STOP and START condition 4.7 1.3 µs THIGH SCL clock high period 4.0 0.6 µs TLOW SCL clock low period Standard Mode Fast Mode THIGH –3 x Tck 2x (THIGH – 3 x Tck) 4.7 1.3 µs THD:STA Hold time START condition. After this period, the first clock pulse is generated TLOW + Tck 4.0 0.6 µs TSU:STA Set-up time for a repeated START condition TLOW +THIGH –THD:STA 4.7 0.6 µs THD:DAT Data hold time FREQ[2:0] = 000 FREQ[2:0] = 001 FREQ[2:0] = 010 FREQ[2:0] = 011 3x Tck 4x Tck 4x Tck 10 x Tck 0 (1) 0 (1) 0.9 (2) ns TSU:DAT Data set-up time (Without SCL stretching) TLOW –THD:DAT 250 100 ns Data set-up time (With SCL stretching) FREQ[2:0] = 000 FREQ[2:0] = 001 FREQ[2:0] = 010 FREQ[2:0] = 011 7x Tck 15 x Tck 15 x Tck 31 x Tck TR Rise time of both SDA and SCL signals 1000 20+ 0.1Cb ns TF Fall time of both SDA and SCL signals 300 20+ 0.1Cb ns TSU:STO Set-up time for STOP condition TLOW +THIGH –THD:STA 4.0 0.6 ns Cb Capacitive load for each bus line 400 400 pF 1 |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
