ADE75 datasheet(139/148 Pages) AD

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Preliminary Technical Data

ADE75xx/ADE71xx

Rev. PrE | Page 139 of 148

DUAL DATA POINTERS

The ADE75XX/ADE71XX incorporates two data pointers. The

second data pointer is a shadow data pointer and is selected via

the data pointer control SFR (DPCON). DPCON features

automatic hardware post-increment and post-decrement as well

as an automatic data pointer toggle.

Table 138. Data Pointer Control SFR SFR (DPCON, 0xA7)

Bit

Location

Bit

Mnemonic

Default

Value

Description

----

Not Implemented. Write Don’t Care.

DPT

Data Pointer Automatic Toggle Enable.

Cleared by the user to disable auto swapping of the DPTR.

Set in user software to enable automatic toggling of the DPTR after each MOVX or MOVC

instruction.

DP1m1,

DP1m0

Shadow Data Pointer Mode. These bits enable extra modes of the shadow data pointer

operation, allowing more compact and more efficient code size and execution.

DP1m1

DP1m0

Behavior of the Shadow Data Pointer

8052 behavior.

DPTR is post-incremented after a MOVX or a MOVC instruction.

DPTR is post-decremented after a MOVX or MOVC instruction.

5, 4

DPTR LSB is toggled after a MOVX or MOVC instruction. (This

instruction can be useful for moving 8-bit blocks to/from 16-bit

devices.)

DP0m1,

DP0m0

Main Data Pointer Mode. These bits enable extra modes of the main data pointer operation,

allowing more compact and more efficient code size and execution.

DP0m1

DP0m0

Behavior of the Main Data Pointer

8052 behavior.

DPTR is post-incremented after a MOVX or a MOVC instruction.

DPTR is post-decremented after a MOVX or MOVC instruction.

3, 2

DPTR LSB is toggled after a MOVX or MOVC instruction. (This

instruction is useful for moving 8-bit blocks to/from 16-bit devices.)

----

Not Implemented. Write Don’t Care.

DPSEL

Data Pointer Select.

Cleared by the user to select the main data pointer. This means that the contents of this 16-

bit register are placed into the DPL, and DPH SFRs.

Set by the user to select the shadow data pointer. This means that the contents of a separate

16-bit register appear in the DPL, and DPH SFRs.

Note the following:

•

The Dual Data Pointer section is the only place in which

main and shadow data pointers are distinguished.

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