M32CSLASH86T datasheet(109/505 Pages) RENESAS

109 / 505 page

Page 86

9. Clock Generation Circuit

)

(

0 (3)

002, 102, 112,

Outputs BCLK

Outputs "L" (not P53)

Outputs fc

Outputs f8

0 (3)

Outputs f32

Outputs ALE

0 (3)

PM07 Bit

CM01 Bit

CM00 Bit

PM14 Bit

CLKOUT Pin Function

PM15 Bit

PM0 Register(1)

CM0 Register(2)

PM1 Register(1)

PM07 Bit

CM01 Bit

CM00 Bit

CLKOUT Pin Function

P53 I/O port

Outputs fc

Outputs f8

Outputs f32

PM0 Register (1)

CM0 Register (2)

9.3.3 fC32

fC32 is the sub clock divided by 32. fC32 is used as a count source for the timers A and B. fC32 is available

when the sub clock is running.

9.3.4 fCAN

fCAN has the same frequency as the main clock. It is a clock for the CAN module only.

9.4 Clock Output Function

The CLKOUT pin outputs fC, f8 or f32.

In memory expansion mode or microprocessor mode, a clock having the same frequency as the CPU clock

can be output from the BCLK pin as BCLK.

Table 9.5 lists CLKOUT pin function in single-chip mode. Table 9.6 lists CLKOUT pin function in memory

expansion mode and microprocessor mode.

Table 9.5 CLKOUT Pin in Single-Chip Mode

- : Can be set to either "0" or "1"

NOTES:

1. Rewrite the PM0 register after the PRC1 bit in the PRCR register is set to "1" (write enable).

2. Rewrite the CM0 register after the PRC0 bit in the PRCR register is set to "1" (write enable).

Table 9.6 CLKOUT Pin in Memory Expansion Mode and Microprocessor Mode

- : Can be set to either "0" or "1"

NOTES:

1. Rewrite the PM1 and PM0 registers after the PRC1 bit in the PRCR register is set to "1" (write enable).

2. Rewrite the CM0 register after the PRC0 bit in the PRCR register is set to "1" (write enable).

3. When the PM07 bit is set to "0" (selected in the CM01 and CM00 bits) or the PM15 and PM14 bits are

set to "012" (P53/BCLK), set the CM01 and CM00 bits to "002" (I/O port P53).

4. M32C/86T cannot be used in memory expansion mode and microprocessor mode.

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