M32CSLASH86T datasheet(150/505 Pages) RENESAS

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Page 127

13. DMAC

)

(

DMAi Request Source Select Register (i=0 to 3)

DSEL0

DSEL1

DSEL2

DMA Request Source

Select Bit(1)

DSEL3

DSEL4

Software DMA

Request Bit(2)

DSR

(b6)

See Table 13.2 for the DMiSL

DRQ

DMA Request Bit(2, 3)

0 : Not requested

1 : Requested

NOTES:

1. Change the DSEL4 to DSEL0 bit settings while the MDi1 and MDi0 bits in the DMD0 and DMD1

registers are set to "002" (DMA disabled). Also, set the DRQ bit to "1" simultaneously when the

DSEL4 to DSEL0 bit settings are changed.

e.g., MOV.B #083h, DMiSL ; Set timer A0

2. When the DSR bit is set to "1", set the DRQ bit to "1" simultaneously.

e.g., OR.B #0A0h, DMiSL

3. Do not set the DRQ bit to "0".

Symbol

Address

After Reset

DM0SL to DM3SL

037816, 037916, 037A16, 037B16

0X00 00002

Function

Bit Name

Bit

Symbol

When a software trigger is selected,

a DMA request is generated by

setting this bit to "1" (When read, its

content is always "0")

Reserved Bit

When read,

its content is indeterminate

Figure 13.2 DM0SL to DM3SL Registers

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